1. Field of the Invention
This invention relates to an image signal processing circuit, an image pickup apparatus, an image signal processing method and a computer program, and more particularly to an image signal processing circuit, an image pickup apparatus, an image signal processing method and a computer program wherein an image pickup device has a plurality of divisional regions and signal processing is carried out individually for signals from the divisional regions.
2. Description of the Related Art
A CCD (Charge Coupled Device) unit, a CMOS (Complementary Metal Oxide Semiconductor) unit and so forth are generally used for an image pickup device for use, for example, with a video camera or a still camera. For example, an existing popular CCD unit receives light of pickup image information for one screen by means of a great number of photodetectors (PDs) thereof and reads out charge signals obtained by photo-electric conversion from the photodetectors through a vertical register and a horizontal register. Then, the CCD unit converts the read out charge signals into a data stream and outputs the resulting data stream from one output channel. Such a one-channel output type CCD unit and a signal processing configuration as just described are described below with reference to FIG. 1.
The CCD unit 10 shown includes a vertical register 11 for transferring charge accumulated in a plurality of photodetectors (PDs) as image pickup elements in a vertical direction, a horizontal register 12 for transferring the charge transferred by the vertical register 11 one by one line in a horizontal direction, and an output amplifier 13 for converting the charge of the horizontal register 12 into a voltage. The output of the output amplifier 13 is inputted to a signal processing section 21.
The signal processing section 21 includes a CDS circuit for executing removal of noise from within an input signal, an AGC circuit for carrying out gain adjustment, an AD conversion section for carrying out AD conversion, and so forth. A digital signal obtained by the signal processing of the signal processing section 21 is accumulated into a line memory 22 and then outputted through an outputting section 23. As a result, such an output image 30 as seen in FIG. 1 is obtained.
In recent years, because of a requirement for increase of the speed of signal processing or together with increase of the number of component pixels of a CCD unit, a configuration has been proposed which divides an output of a CCD unit into a plurality of outputs, carries out parallel processing of the outputs, multiplexes the thus processed outputs and outputs the resulting multiplexed output. High-speed signal processing is implemented by such a configuration as just described. For example, if signals of 2 channels are outputted, then signal processing of output data can be carried out using an frequency equal to one half that used where an output of one channel is used.
A CCD unit and a signal processing configuration ready for 2-channel outputs are described with reference to FIG. 2. The CCD unit 50 shown includes a vertical register 51 for transferring charge accumulated in photodetectors (PDs) in a vertical direction, and two horizontal registers 52 and 53 for transferring the charge transferred by the vertical register 51 one by one line in horizontal directions. The first horizontal register 52 receives outputs of those ones of the photodetectors which are included in a left half region in FIG. 2 while the second horizontal register 53 receives outputs those ones of the photodetectors which are included in a right half region in FIG. 2.
The accumulated data of the first horizontal register 52 are converted into voltages by an output amplifier 54 and inputted to a signal processing section 62. Meanwhile, the accumulated data of the second horizontal register 53 are converted into voltages by another output amplifier 55 and inputted to another signal processing section 61. The two signal processing sections 62 and 61 process the outputs of the component pixels in the left and right half regions in FIG. 2, respectively. High-speed processing is implemented by the parallel processing.
The data obtained by the signal processing of the signal processing sections 61 and 62 are inputted to line memories 63 and 64, respectively, multiplexed by a multiplexer 65 and then outputted through an outputting section 66. As a result, for example, such an output image 70 as shown in FIG. 2 is obtained.
According to the configuration shown in FIG. 2, the image pickup region of the CCD unit is divided into two left and right divisional regions, and data transfer and signal processing are executed parallelly for the horizontal registers 52 and 53 corresponding to the left and right divisional regions. Consequently, the output speed of the image is improved. However, since the plural output amplifiers 54 and 55 are used, a difference between output levels appears based on a difference in characteristic of the output amplifiers. In particular, where two outputs are derived from the CCD unit and amplified by the different output amplifiers 54 and 55 as seen in FIG. 2, a dispersion between the output data is caused by individual differences of the output amplifiers. Characteristics of the output amplifiers depend upon the fabrication process and the dispersion, and it is considerably difficult to make characteristic values of the amplifiers fully coincide with each other.
Further, while signals transmitted through the output amplifiers 54 and 55 are processed and converted into digital signals by the signal processing sections (CDS/AGC/AD blocks) 61 and 62, also it is very difficult to make characteristics of the CDS/AGC/AD functions fully coincide with each other. As a result, a difference appears between the output levels of the left and right images as seen from the output image 70 shown in FIG. 2.
In order to correct the levels of the left and right images to minimize the difference between the levels to make the boundary between the image pickup regions less conspicuous, the levels of the left and right image outputs should be made equal to each other. For example, a method of calculating and comparing output levels from the left and right regions with each other and correcting one of the output levels so as to coincide with the other output level is used. This method is disclosed, for example, in Japanese Patent No. 3,619,077 (hereinafter referred to as Patent Document 1). However, where the method disclosed in Patent Document 1 is applied, it is necessary to select, from within the divisional regions of the pixels, those regions which have a high correlation such as, for example, regions in which images of the same image pick object are picked up like regions in which images of the sky are picked up in the left and right image regions and carry out level comparison between the output levels of the select regions. Accordingly, it is necessary to carry out, as processing for level control, a decision process of the correlation, a selection process of regions having high correlation and so forth. Further, it is a problem that, where pixel regions having high correlation cannot be detected from within the divisional regions, the processing is disabled. It is to be noted that, while, in the description above, a CCD unit is used as an image pickup device, the situation is similar also where a CMOS (Complementary Metal Oxide Semiconductor) unit is applied as an image pickup device.
Japanese Patent Laid-Open No. 2002-252808 (hereinafter referred to as Patent Document 2) discloses an apparatus which averages, in order to correct the left and right output levels to minimize the level difference between the output levels, pixel data of the left and right channels over a plurality of lines to determine a difference between the pixel data and determine a gain correction value to carry out the correction. However, also the apparatus of Patent Document 2 requires a process which takes the correlation of the divisional regions into consideration and suffers from similar problems to those described above.
Japanese Patent Laid-Open No. 2003-143491 (hereinafter referred to as Patent Document 3) discloses an apparatus which includes a control system for controlling the outputs of the left and right channels independently of each other and adjusting the control system so as to minimize the level difference. However, where such an apparatus as just described is used, it is necessary to use the new control system, which gives rise to a problem of increase of the circuit scale and the cost.
Japanese Patent Laid-Open No. 2004-64404 (hereinafter referred to as Patent Document 4) discloses an image pickup apparatus which executes image pickup in a light blocking state, detects a level difference between the divisional regions based on the picked up image data to obtain data for level adjustment and carry out level adjustment for the picked up image data using the data for level adjustment. However, the image pickup apparatus of Patent Document 4 has a problem that it requires an acquisition process for control parameters prior to image pickup.